1. Field of the Invention
The instant disclosure relates to a manufacturing method of charge storage device; in particular, to a manufacturing method of capacitor structure and semiconductor device using the same.
2. Description of Related Art
With the vigorous development of semiconductor industry, the dimension of integrated circuit elements nowadays range from micron size to submicron size. For dynamic random access memory (DRAM), that is to say, the cross-sectional area of each capacitor and each gap between capacitors become smaller. Basically, the better operating capability of computer software becomes, the greater memory capacitance of computer hardware need. Facing up to the problem of the capacitor dimension become smaller, the memory capacitance must be increased. Thus, the traditional method of manufacturing DRAM capacitors certainly needs to be improved.
Generally, the following methods are often used to increase capacitance to store the bits of data. The first method is to decrease the dielectric constant of the dielectric material. The second method is to decrease the thickness of the dielectric layer. The third method is to increase the electrode contact-surface area. However, in view of the resolution of pattern transfer is increased and the critical dimension of the line width is reduced. Limitation exists for improving lithography by only optical improvement.
Taiwan patent no. 1399831 discloses one type of double-side capacitor structure having a plurality of supports, each of which may connect at least two adjacent lower electrodes. However, in order to integrate with high density DRAM, each capacitor must provide sufficient capacitance to maintain the signal strength. The design of DRAM will focus on the correlation between the height and thickness of the electrode and the capacitance. In summary, the increased height or the decreased thickness of the capacitor electrode will result in weakening the structural strength to cause twin bit failure.
In addition, the capacitor electrode having a large aspect ratio of height over width can make the capacitor structure, and this can lead toppling/collapsing of the capacitor electrode in wet etching process due to surface tension of the etching solution. Consequently, the yield rate would decrease prominently.